Product Summary

The EPF8452ALC84-4 is a Flexible Logic Element MatriX (FLEX) combines the benefits of both erasable programmable logic devices (EPLDs) and fieldprogrammable gate arrays (FPGAs). The EPF8452ALC84-4 is ideal for a variety of applications because it combines the fine-grained architecture and high register count characteristics of FPGAs with the high speed and predictable interconnect delays of EPLDs. Logic is implemented in LEs that include compact 4-input look-up tables (LUTs) and programmable registers. High performance of EPF8452ALC84-4 is provided by a fast, continuous network of routing resources.

Parametrics

EPF8452ALC84-4 absolute maximum ratings: (1)Supply voltage: –2.0 to 7.0 V With respect to ground; (2)DC input voltage: –2.0 to 7.0 V; (3)DC output current, per pin: –25 to 25 mA; (4)Storage temperature: –65 to 150 ℃; (5)Ambient temperature : –65 to 135 ℃; (6)Junction temperature: Ceramic packages, under bias: 150 ℃, PQFP and RQFP, under bias: 135 ℃.

Features

EPF8452ALC84-4 features: (1)Low-cost, high-density, register-rich CMOS programmable logic; (2)device (PLD) family: 2,500 to 16,000 usable gates, 282 to 1,500 registers; (3)System-level features: In-circuit reconfigurability (ICR) via external Configuration EPROM or intelligent controller, Fully compliant with the peripheral component interconnect; (4)(PCI) standard; (5)Powerful I/O pins: Programmable output slew-rate control reduces switching noise; (6)Peripheral register for fast setup and clock-to-output delay.

Diagrams

EPF8452ALC84-4 block diagram

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