SN74GTLPH1645DGV

Product Summary

The SN74GTLPH1645DGV is a 16-bit lvttl-to-gtlp adjustable-edge-rate bus transceiver. It provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translation. It is partitioned as two 8-bit transceivers. The SN74GTLPH1645DGV provides a high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP’s reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC circuitry, and TI-OPC circuitry. Improved GTLP OEC and TI-OPC circuits of the SN74GTLPH1645DGV minimize bus-settling time and have been designed and tested using several backplane models. The high drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 11 W.

Parametrics

SN74GTLPH1645DGV absolute maximum ratings: (1)VCC BIAS VCC Supply voltage range: –0.5 to 4.6 V; (2)VI Input voltage range: -0.5 to 7 V; (3)VO Voltage range applied to any output in the high-impedance or power-off state: –0.5 to 7 V; (4)IO Current into any A-port output in the high state: 48 mA; (5)Continuous current through each VCC or GND: ±100 mA; (6)IIK Input clamp current: –50 mA; (7)IOK Output clamp current: –50 mA; (8)Tstg Storage temperature range: –65 to 150 ℃.

Features

SN74GTLPH1645DGV features: (1)Member of the Texas Instruments Widebus Family; (2)TI-OPC Circuitry Limits Ringing on Unevenly Loaded Backplanes; (3)OEC Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference; (4)Bidirectional Interface Between GTLP Signal Levels and LVTTL Logic Levels; (5)LVTTL Interfaces Are 5-V Tolerant; (6)High-Drive GTLP Outputs (100 mA); (7)LVTTL Outputs (–24 mA/24 mA); (8)Variable Edge-Rate Control (ERC) Input Selects GTLP Rise and Fall Times for Optimal Data-Transfer Rate and Signal Integrity in Distributed Loads; (9)Ioff, Power-Up 3-State, and BIAS VCC Support Live Insertion; (10)Bus Hold on A-Port Data Inputs; (11)Distributed VCC and GND Pins Minimize High-Speed Switching Noise.

Diagrams