Product Summary

The TE28F640J3C120 is a StrataFlash Memory. It contains high-density memories organized as 32 Mbytes or 16Mwords (256-Mbit, available on the 0.18μm lithography process only), 16 Mbytes or 8 Mwords(128-Mbit), 8 Mbytes or 4 Mwords (64-Mbit), and 4 Mbytes or 2 Mwords (32-Mbit). The TE28F640J3C120 can be accessed as 8- or 16-bit words. A 128-bit Protection Register has multiple uses, including unique flash device identification. The TE28F640J3C120’s optimized architecture and interface dramatically increases read performance by supporting page-mode reads. This read mode is ideal for non-clock memory systems.

Parametrics

TE28F640J3C120 absolute maxing ratings: (1)Temperature under Bias Extended: –40 ℃ to +85 ℃; (2)Storage Temperature: –65 ℃ to +125 ℃; (3)Voltage On Any signal: –2.0 V to +5.0 V; (4)Output Short Circuit Current: 100 mA.

Features

TE28F640J3C120 features: (1)110/115/120/150 ns Initial Access Speed; (2)125 ns Initial Access Speed (256 Mbit density only); (3)25 ns Asynchronous Page mode Reads; (4)30 ns Asynchronous Page mode Reads(256Mbit density only); (5)32-Byte Write Buffer: 6.8 μs per byte effective programming time; (6)Program and Erase suspend support; (7)Flash Data Integrator (FDI), Common Flash Interface (CFI) Compatible; (8)Absolute Protection with VPEN = GND; (9)Individual Block Locking; (10)Block Erase/Program Lockout during Power Transitions.

Diagrams

TE28F640J3C120 block diagram

TE28F004S3-150
TE28F004S3-150

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Data Sheet

Negotiable 
TE28F004S5-100
TE28F004S5-100

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Negotiable 
TE28F004SC-100
TE28F004SC-100

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TE28F008B3B120
TE28F008B3B120

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Negotiable 
TE28F008B3BA110
TE28F008B3BA110

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Negotiable 
TE28F008SA-100
TE28F008SA-100

Other


Data Sheet

Negotiable