Product Summary

The XC2V500-6FG456C is a platform FPGA developed for high performance from low-density to high-density designs that are based on IP cores and customized modules. The XC2V500-6FG456C delivers complete solutions for telecommunication, wireless, networking, video, and DSP applications, including PCI, LVDS, and DDR interfaces. The leading-edge 0.15 μm / 0.12 μm CMOS 8-layer metal process and the Virtex-II architecture are optimized for high speed with low power consumption.

Parametrics

XC2V500-6FG456C absolute maximum rating: Nominal frequency: 420MHz.

Features

XC2V500-6FG456C features: (1)Industry First Platform FPGA Solution; (2)IP-Immersion Architecture, Densities from 40K to 8M system gates; 420 MHz internal clock speed (Advance Data); 840+ Mb/s I/O (Advance Data); (3)SelectRAM Memory Hierarchy; (4)Dedicated 18-bit x 18-bit multiplier blocks; (5)Fast look-ahead carry logic chains; (6)Up to 93,184 internal registers / latches with Clock Enable; (7)Up to 93,184 look-up tables (LUTs) or cascadable 16-bit shift registers; (8)Wide multiplexers and wide-input function support; (9)Horizontal cascade chain and Sum-of-Products support; (10)Internal 3-state bussing; (11)Up to 12 DCM (Digital Clock Manager) modules; (12)16 global clock multiplexer buffers; (13)Fourth generation segmented routing structure; (14)Predictable, fast routing delay, independent of fanout; (15)Up to 1,108 user I/Os; (16)19 single-ended standards and six differential standards; (17)Programmable sink current (2 mA to 24 mA) per I/O; (18)Digitally Controlled Impedance (DCI) I/O: on-chip termination resistors for single-ended I/O standards; (19)PCI-X @ 133 MHz, PCI @ 66 MHz and 33 MHz compliance, and CardBus compliant; (20)Differential Signaling; (21)Proprietary high-performance SelectLink Technology.

Diagrams

XC2V500-6FG456C block diagram

XC2V1000
XC2V1000

Other


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