Product Summary

The IS42S16800E-75TLI is a 128Mb synchronous dram. It is a high speed CMOS, dynamic random-access memory designed to operate in 3.3V Vdd and 3.3V Vddq memory systems containing 134,217,728 bits. Internally configured as a quad-bank DRAM with a synchronous interface. The IS42S16800E-75TLI includes an AUTO REFRESH MODE, and a power-saving, power-down mode. The IS42S16800E-75TLI has the ability to synchronously burst data at a high data rate with automatic column-address generation, the ability to interleave between internal banks to hide precharge time and the capability to randomly change column addresses on each clock cycle during burst access.

Parametrics

IS42S16800E-75TLI absolute maximum ratings: (1)Vdd max Maximum Supply Voltage: –0.5 to +4.6 V; (2)Vddq max Maximum Supply Voltage for Output Buffer: –0.5 to +4.6 V; (3)Vin Input Voltage: –0.5 to Vdd + 0.5 V; (4)Vout Output Voltage: –1.0 to Vddq + 0.5 V; (5)Pd max Allowable Power Dissipation: 1 W; (6)Ics Output Shorted Current: 50 mA; (7)Topr Operating Temperature Com.: 0 to +70 ℃, Ind.: –40 to +85; (8)Tstg Storage Temperature: –55 to +150 ℃.

Features

IS42S16800E-75TLI features: (1)Clock frequency: 200, 166, 143, 133 MHz; (2)Fully synchronous; all signals referenced to a positive clock edge; (3)Internal bank for hiding row access/precharge; (4)LVTTL interface; (5)Programmable burst length: (1, 2, 4, 8, full page); (6)Programmable burst sequence: Sequential/Interleave; (7)Auto Refresh (CBR); (8)Self Refresh; (9)4096 refresh cycles every 64 ms; (10)Random column address every clock cycle; (11)Programmable CAS latency (2, 3 clocks); (12)Burst read/write and burst read/single write operations capability; (13)Burst termination by burst stop and precharge command; (14)Industrial Temperature Availability.

Diagrams

IS42S16800E-75TLI diagram

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IS421

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