Product Summary

The K4S281632K-UC60 is a 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 8 bits. The K4S281632K-UC60 is fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

K4S281632K-UC60 absolute maximum ratings: (1)Voltage on any pin relative to VSS: -1.0 to 4.6 V; (2)Voltage on VDD supply relative to VSS: -1.0 to 4.6 V; (3)Storage temperature: -55 to +150 ℃; (4)Power dissipation: 1 W; (5)Short circuit current: 50 mA.

Features

K4S281632K-UC60 features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation; (4)MRS cycle with address key programs: CAS latency (2 & 3), Burst length (1, 2, 4, 8 & Full page), Burst type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst read single-bit write operation; (7)DQM (x8) & L(U)DQM (x16) for masking; (8)Auto & self refresh; (9)64ms refresh period (4K Cycle).

Diagrams

K4S281632K-UC60 block diagram

K4S280432A
K4S280432A

Other


Data Sheet

Negotiable 
K4S280432B
K4S280432B

Other


Data Sheet

Negotiable 
K4S280432C
K4S280432C

Other


Data Sheet

Negotiable 
K4S280432E-TC(L)75
K4S280432E-TC(L)75

Other


Data Sheet

Negotiable 
K4S280432F
K4S280432F

Other


Data Sheet

Negotiable 
K4S280432F-TC(L)75
K4S280432F-TC(L)75

Other


Data Sheet

Negotiable