SN74SSTU32864CZKER

25-bit configurable registered buffer, 96-BGA, 1.7V to 1.9V, ±50 mA

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PartNumber:: SN74SSTU32864CZKER

Brand:: Texas Instruments - TI | Pack: BGA | D/C: 07+

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Products Upload time: 2012-06-09

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Product Summary

The SN74SSTU32864CZKER is a 25-bit configurable registered buffer with sstl_18 inputs and outputs. It is designed for 1.7-V to 1.9-V VCC operation. In the 1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices per DIMM are required to drive 18 SDRAM loads. The SN74SSTU32864CZKER operates from a differential clock (CLK and CLK). Data are registered at the crossing of CLK going high and CLK going low. The SN74SSTU32864CZKER supports low-power standby operation. When RESET is low, the differential input receivers are disabled, and undriven (floating) data, clock, and reference voltage (VREF) inputs are allowed. In addition, when RESET is low, all registers are reset and all outputs are forced low.

Parametrics

SN74SSTU32864CZKER absolute maximum ratings: (1)Supply voltage range, VCC: –0.5 V to 2.5 V; (2)Input voltage range, VI: –0.5 V to 2.5 V; (3)Output voltage range, VO: –0.5 V to VCC + 0.5 V; (4)Input clamp current, IIK (VI < 0 or VI > VCC): ±50 mA; (5)Output clamp current, IOK (VO < 0 or VO > VCC): ±50 mA; (6)Continuous output current, IO (VO = 0 to VCC): ±50 mA; (7)Continuous current through each VCC or GND: ±100 mA; (8)Package thermal impedance, θJA: 36℃/W; (9)Storage temperature range, Tstg: –65℃ to 150℃.

Features

SN74SSTU32864CZKER features: (1)Member of the Texas Instruments Widebus Family; (2)Pinout Optimizes DDR-II DIMM PCB Layout; (3)Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer; (4)Chip-Select Inputs Gate the Data Outputs from Changing State and Minimizes System Power Consumption; (5)Output Edge-Control Circuitry Minimizes Switching Noise in an Unterminated Line; (6)Supports SSTL_18 Data Inputs; (7)Differential Clock (CLK and CLK) Inputs.